We are looking for several Senior and Principal FPGA/ASIC Engineer’s to join my client’s team in Cambridge. Giving you the opportunity and responsibility for the design and delivery of their next-gen FPGA solutions.
You would need at least 3 years of FPGA or ASIC experience using RTL. You will be working in a leading-edge technological engineering environment, and you will be involved in the design/ verification and debug of VHDL/Verilog based FPGA solutions for new products.
We are looking for someone who is extremely passionate about engineering and about brand-new technology.
Required experience would be:
- At least 3 years’ experience within FPGA / ASIC Design (more experience is also definitely of interest)
- Knowledge of frontend RTL design
- Strong skills in VHDL or Verilog HDLs
- Experience with Verification techniques would be desirable
You’ll learn a lot, and you will enjoy working within an experienced team which has a very positive, collaborative environment, good energy, and excellent prospects for long-term career growth.
For details, Andrew Emberson @ IC Resources