Junior RTL Design Engineer - ASIC/FPGA, Marseille

Junior RTL Design Engineer - ASIC/FPGA, Aix En Provence

Job ID: 171231
Location: Marseille, France, Europe
Salary: Competitive - dependent on experience.
Job Type: Permanent

If you are a digital design engineer at the start of your career, this could be the perfect opportunity for you! My client is a leading specialist of IP in the PCIe and high-speed interconnect domain, and they are looking for a junior engineer to join their design and integration team. You will have the opportunity to develop your skills with a team of experts, and in a fascinating international environment. 

This is a superb opportunity which not only offers exciting projects but also 60% remote working - which also applies to post covid! Based in Aix-en-Provence, France, you must be willing to work onsite 2 days per week but you can be based anywhere in France.

The key skills requirement is for applicants to have at least 2 years' RTL design experience, with an understanding of verification.

Responsibilities / Qualifications
  • Bachelor or Mater's Degree in Electronic engineering or similar related field
  • Fluent English
  • Experience working in a digital design environment - with a focus on ASIC or FPGA - 2 years minimum
  • Excellent communications skills - ability/willingness to work in an international environment, with multiple teams and customers
  • Confident experience in RTL design (Verilog)
  • Understanding of UVM verification processes - within the role you will be responsible for verifying the RTL design/code yourself
  • Previous experience with PCIe, MAC, PHY is a bonus!
Please contact Rob Hudson @ IC Resources for more information asap!

+44 (0)118 988 1150

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