Primary Job Location: Farnborough Secondary Job Location: Manchester Job Description:
This is a fascinating opportunity for a Digital Physical Design Engineer to join a multinational company developing complex chip designs for the space industry – arguably one of the most exciting industries in the world.
Based in Farnborough, my client is expanding their digital backend team and has an opportunity for a Digital Physical Design Engineer to come onboard and work alongside the Physical Design Lead.
You will be working on physical implementation of complex ASIC designs and testchips across multiple process technologies. This team uses Cadence tools, however Synopsys or Cadence users will both be considered. This company is set to grow throughout 2019 - it’s a great opportunity to join a fast growing team that can offer real career prospects for growth within a global company.
You will need to have:
- A good technical degree in Electronic Engineering or similar
- A good understanding of the RTL-GDSII flow
- Hands-on skills within synthesis / floorplanning / Place and Route (P&R) / Static Timing Analysis (STA) and Timing Closure
- Cadence / Synopsys design environment
- Experience using scripting languages (Tcl/Python/Perl etc.)
- Experience working with 28nm advanced nodes and below.
- Plenty of motivation and enthusiasm to learn
Please contact Rachel Mason @ IC Resources for further information.