Join an international semicon company in the beautiful city of Graz as a Principal Digital Verification Engineer (m/f/d).
- A university degree in electrical engineering or similar
- 10+ years of experience in digital verification in UVM
- Sound knowledge of Verilog and SystemVerilog
- Several years in a leading role
- Fluent English
- Lead the design verification activities
- Define the verification strategy and environment
If this job as a Principal Digital Verification Engineer attracts your interest and suits your background, please get in contact with Nicole Lamprecht for more information.