Senior ASIC Design PCIe

Digital Design Engineer – Cork

I am looking for a Digital Design Engineer experienced in PCI Express to come and join my client in Cork. My client is a Global Semiconductor company who work within a range of markets and are now looking to grow their team in Cork. You will be designing the PCI Express for advanced ASICs that support a large number of industry standard protocols. This is a fantastic opportunity for a Senior Engineer looking to lead a team and help with the development with junior Engineers, my client offers excellent opportunities for career progression and pride themselves on their internal promotion scheme.

Responsibilities would include:

• General RTL and ASIC development
• Participate in the RTL implementation, synthesis, formality check as well as ECOs
• Support post-layout timing closure and verification
• Participate in the investigation & assessment of emerging SerDes/Transceiver technologies & IPs

PCI-Express Development:

• Integrate PCI Express logic into a final design, including resets, clock domain crossing, power-down controls, calibration logic, and associated register maps.
• Develop Block Level Constraints and run synthesis
• Perform Static Timing Analysis of the PCI Express digital logic and review post-layout timing.
• PCI-Express and related protocols such as CCIX and CXL

Requirements:

• Experience is SOC IP development for PCI-Express and associated protocols
• Strong Experience in RTL design, design verification, synthesis & formality
• Strong Experience in Static Timing Analysis and Verilog simulation tools

For more information on this role or others please contact Jordan Browne at IC-Resources- 01189073075.