Senior Analog IC Layout Engineer, Norway

Looking for an Analog IC Layout position in Norway? A based IC design team of a Global Semiconductor company is looking for an experienced Analog IC Layout Engineer to take charge of the top-level integration of Analog IC Layouts.

A University degree in Electronics Engineering as well as 5+ years of experience in Cadence tools, DRC, LVS and standard CMOS process nodes is required to be considered for this opportunity as well as solid experience integrating Layout at the full chip top level.

Visa can be considered for the right candidate and preference will be given to candidates based in the EU.

For further information and to apply, click APPLY NOW to speak to Ane!