For our client, a global semiconductor company in Hamburg, Germany we are searching for a Senior Manager Verification.
For this technically challenging leadership position as a Senior Manager Verification we are looking for digital verification managers with an experience in digital verification of at least 8-10 years. As a Senior Manager Verification you will require solid knowledge of HW description languages like Verilog, SystemVerilog or similar, a university degree in Electrical Engineering or Electronics or equivalent and solid debugging skills and experience with UVM. For this position you also bring good C/C++ knowledge for verification and leadership experience.
In the position of a Senior Manager Verification you will:
- lead a team of pre-silicon verification engineers
- develop verification solutions for subsystems and SOCs
- develop the verification strategy
- constantly improve the script environment
- initiate the introduction of new tools
If this vacancy sounds appealing to you, please get in contact with Nicole Lamprecht.