Senior RF/Analog IC Layout Engineer

Cambridge based IC design team is looking for an RF/Analog IC Layout Engineer to contribute to block and top level layout of RF/Analogue Layout in various process technology nodes primarily for high frequency transceivers including the baseband and RF front ends.

In your position at RF/Analog IC Layout Engineer you will have responsibility for layout of a complex transceiver designs in smaller geometries. Your tasks include the following:

• Hands-on block-level layout design and verification
• Top-level IP floor-planning and integration and IC sign-off 
• Work closely with analogue design team on IP floor-planning, trial layout design and parasitic extraction of critical structures.
• Co-ordinate layout activities
• Collaborate with CAD, process technology, package design and Antenna team
• Document own work and participate in design reviews
• Provide guidance to junior team members

The successful RF/Analog IC Layout Engineer is industry degree qualified and has at least 8 years of experience in RF/Analog IC Layout (including at least 2 years in RF IC Layout for LNA, LO, PA) in a Cadence environment as well as very strong experience with Mentor Calibre.

This is a great opportunity for an RF/Analog IC Layout Engineer to join a team in London.

To apply, please click APPLY NOW to be contacted by a member of our team.