My client is looking to recruit a Senior Design Verification Engineer to join their team working on the next generation of SERDES IP. They are at the forefront of high-speed interface chips and Memory IP.
Remote working available with very occasional travel to the Toronto or Bay Area (San Jose) Lab (Quarterly). Job Responsibilities
- As a Senior Design Verification Engineer you will have a good level of autonomy for IP verification planning and execution, and will be constantly interacting with the analog, digital and systems engineering teams.
- Composing detailed verification plans and creating test benches from scratch.
- Develop automated UVM or similar test environments.
- Develop test cases and work on the development of next generation SERDES IP. (previous SERDES experience is not required)
- 3-5+ years hands on Design Verification experience (UVM is a must!)
- Experience creating Test Benches from scratch
- Experience using modern IC CAD and design environment tools
- Located in Canada/USA or be in possession of H1B Visa.
(Experience with mixed-signal modelling and verification is a benefit)
Competitive package with strong benefits on offer + Remote Work!
If you’d like to discuss this Senior Design Verification Engineer role in more detail - then please do not hesitate to contact Zohaib at IC Resources.
Zohaib Lone – IC Resources – US Consultant