SerDes System Architect ,
Job ID: 170111
Location: Cambridgeshire, England, UK
Salary: £100,000 - £115,000 plus stock options
Job Type: Permanent
This is a new and unique opportunity for a SerDes System Architect to join a fast growing start-up company working in the area of Very High Speed Analog IC Design for Data Centre applications.
Working within a dedicated and experienced team of Analog IC Design Engineers, you will be responsible for high speed SerDes architecture supporting the development of Very High Speed (10+ Gb/s) transistor level Design. You will be overseeing the architecture of associated circuits, including Phase Locked Loop (PLL), Delay Locked Loop (DLL), Receiver and Transmitter architectures, Continuous Time Linear Equaliser (CTLE), Decision Feedback Equalizer (DFE), Feed Forward Equaliser (FFE).
Absolute mastery in partitioning chip level requirements to specifications at the block level as well as deep experience in architecting PLL and CDR systems are must.
Industry qualified, the successful SerDes System Architect to will have a minimum of 10 years of relevant experience as well as a strong proficiency in High Speed Analog IC design. You will have an excellent understanding of the Cadence design environment with deep knowledge of Analog and Digital design flows. You will work well within a diverse team whilst demonstrating technical leadership.
This is a great opportunity to play a key role within a fast expanding company working on leading edge and innovative technology.
Contact Leon at IC Resources today to apply.