Manage the activities of a team of 6 to 8 design engineers, developing the SoCs for the IoT BU. Set up, manage and evolve the design flow.
Manage and develop the team competencies by recruiting, training, and coaching.
Manage the projects, assign resources and follow up progresses, manage priorities and lead times, manage the efficiency and delivery quality.
Technically participate in the full development flow of the SoC products, including the digital IP, analog IP, design integration, backend flow, etc.
Set up, interface, and collaborate with the IP providers, the design service providers, the back-end subcontractors, the foundry, and the package/test house, to guarantee the IP readiness, DFT/DFM, and overall delivery quality.
Participate in feasibility study, product specification and datasheet, product package, test, debug, verification, and characterization.
Key skills & knowledge:
Must have solid experience in all phases of SoC development, including RTL coding, RTL simulation, integration, synthesis, STA, formal proof, design for testability (DFT), design for manufacture (DFM), and post-layout simulation.
Must have proven knowledge and experience in microcontroller architecture, APB/AHB/AXI, ARM microcontrollers, especially in the Cortex-M cores. RISC-V core knowledge is a plus.
Must have proven knowledge and experience in digital IP design and verification. Analog and mixed signal IP development and integration experience is a big plus.
Preferred security IP and secure product experiences.
Must be very familiar with Cadence and Synopsis design tools.
Must have solid experience in management of an embedded SoC design team. Must be proficient in project management.
Must have strong passion and competency for people management and motivation.
Must have the ability to communicate effectively with multi-levels of internal and external interfaces.
Must be able to define new positions depending on the long-term objectives and to select the most effective profiles.