Superb Verification opportunity – Junior engineers through to principal and staff!
I am looking for Verification Engineers across varying levels for my client, I work exclusively with based in the beautiful City of Cork, Ireland. To give you an insight my client is a global leader in wireless communications SOC's who are expanding their European headquarters.
As part of their next growth phase, they are seeking skilled ASIC / SOC Verification to join their CPU and SOC development teams.
- Experience in design, testing and verification in hardware and software on SoCs and SoC Methodologies for verifying complex units on SoC using industry standard tools and technologies
- Proficient in developing unit and SoC level test benches using OVM/UVM
- Constrained random functional verification environment in System Verilog
- Experience in Gate Level Simulation (GLS) verification flow for SoC verification.
- Experience of pre and post-silicon verification testflow and automated test benches
- Strong knowledge of test-plan generation, coverage analysis transaction level modelling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog
- Verilog, C/C++, System C, Java, TCL/Perl/shell-scripting required
- Building and leading verification teams is a plus (more experienced engineers)
- RTL design and front-end design flow knowledge.
As a top company they offer a fantastic benefits package including good salaries, RSU’s, pension, life assurance and medical cover as well as a relocation package!
APPLY NOW! Or for more information contact Rachel Mason at IC Resources. You must have EU working rights.