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A Semiconductor company based in the greater London area is looking for an Analog IC Layout Engineer to support their design team in the development of applications for science.
In this position you will be involved with the Full Custom top level layout and also to work on IP sub blocks and assemble them at the top. You will also be involved in mask design for internal processing of wafers.
As the successful Analog IC Layout Engineer you are industry degree qualified and have at least 2 years of experience from within a similar position using Cadence tools and standard verification tools.
For further information please contact Ane at IC Resources with your CV.