A 1bn $ Semiconductor company based in Bristol is looking for an experienced Digital ASIC Design Engineer to join their expanding SoC Design team.
If you are the right person you can expect to be very well taken care of - a good relocation package is on offer (if you need one), together with excellent remuneration, a relaxed office environment and a good work-life balance.
In this role as a Digital ASIC Design Engineer you will be an RTL Design expert, focussing on CPU platforms and ADAS (radar for autonomous cars) platforms and IP development. Using SystemVerilog, you will be writing RTL code for high speed logic and carrying out implementation utilising low power design techniques. You'll have the chance to enhance your architectural understanding of processor development concept and challenges, working within a small team of highly experienced engineers.
· A number of years' prior experience working as a Digital ASIC Design Engineer are key
· A very strong background developing RTL cores using Verilog / SystemVerilog
· Strong knowledge of synthesis and IP definition
· Microprocessor development experience / knowledge would be ideal
· An ability to communicate concepts an ideas very effectively
· Excellent problem-solving skills are of course important!
An ability to plan, guide and track progress of small team; or on specific activity across a larger team
Our client will consider skilled Digital ASIC Design Engineers from several years' experience up to about a decades' experience, however there is flexibility around this for the right person.
As part of the benefits you will receive a healthy annual bonus, a very good company contribution into your pension pot, excellent life assurance scheme and generous holiday allowance with the possibility for some flexible working arrangements if need be.
Please get in touch for details: email firstname.lastname@example.org
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