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Digital Silicon Design Engineer

This is truly a fantastic opportunity for a Senior/Principal level ASIC Design engineer to join an innovative start up located in the busy and thriving city of Bristol. The Principal level engineer initially will be involved in a small team, developing semiconductor devices from architecture down to RTL and working closely with back-end design houses.


This is a great opportunity to join a business at their early stages and contribute in their growth and success developing chips and associated software for 5G infrastructure.


As a new business my client offers a truly competitive salary alongside other benefits including flexible working (although you will be required to be onsite 2-3 days per week)


The essential requirements of the role include:



  • SoC design

  • Demonstrating the ability to solve complex SoC design problems

  • Working with a team with minimum supervision


In addition candidates must have hands on experience with some of the following: As a whole team is being built I aim to cover the areas within the team.



  • Architectural specification of complex digital chips

  • Integration of complex DSP processors

  • RTL Design - Verilog

  • Top-level chip integration, including high speed SerDes, pad ring design

  • Silicon and System debug

  • DDR Interfaces

  • Pci, ethernet and other SerDes based communications

  • Knowledge of wireless systems (3GPP, WiFi)

  • Scripting - Python

  • Experience in using C/C++ and'or System C

  • Synthesis and Place & Route


For more information on this exciting opportunity please contact Rachel mason @ IC Resources

South West England

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Job Details
  • Bristol, England
  • Permanent
  • 156413_icr
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