Junior Analog IC Layout Engineer
Switzerland, Europe
Permanent
Competitive salary depending on experience
V-179850
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Ane Bauer
Analog | Mixed Signal | RFIC design
A Switzerland based Semiconductor company developing and manufacturing the world's leading technology platforms across everything ultra-low power, from Bluetooth Low Energy to RFID, MCUs, sensor interfaces and energy harvesting for a wide range of applications from consumer to automotive, is looking for an experienced Analog IC Layout Engineer. The job location is Marin in the French speaking part of Switzerland. You will be working in collaboration with the IC design team under the lead of the project manager to develop IC or SoC in advanced technologies.
The position requires knowledge of the entire IC physical development. As a member of a development team, you will be responsible for the following:
The position requires knowledge of the entire IC physical development. As a member of a development team, you will be responsible for the following:
- Floorplanning – Top Level Assembly
- Design layout of complex RF or Analog IPs
- Deliver clean layout data for Tape-out and mask generation
- Review and analyse circuits as well as floorplans with IC designers
- Strong autonomy in his field, good communication skills, strong team player
- Min. Masters in electrical / electronic engineering
- At least 5 year experience in advanced nodes
- Used to work in multicultural, multi-site team environment
- Strong analog layout skills and techniques
- Solid knowledge of device construction and fab processing in advanced nodes
- Experience of advanced technologies such as 28nm / 16 nm FinFET or FD SOI is a strong
- Expertise with DFM topic is a must ( ideally in Automotive projects)Familiar with Cadence layout environment
- Scripting capabilities in Unix, Shell, Skill, TCL or Python
- English oral & written is a must