A leader in the development of Analog Mixed Signal IC's for the automotive industry is looking for a highly experienced expert in the development of runsets for physical verification of IC layouts using EDA software tools (DRC, LVS, parasitic extraction). You will join their EDA team in Austria and develop design packages for optimal use of power technologies, give expert support to address technology and product challenges and match EDA flows and infrastructures with the product needs. These EDA activities include the development of runsets for proper verification of IC layouts.
You will develop for physical
verification of IC layouts using EDA software tools (DRC, LVS, parasitic
extraction), verification test structures and actively work on
the improvement of methodology for layout verification and quality assurance
and provide support for physical verification of power technology IC designs.
The successful candidate is
university Master degree qualified and has a minimum of 7+ year of experience
in a similar role in runset development for physical verification of IC's in
Mentor Calibre, DRC, LVS and parasitic RC extraction. CAD/EDA and programming
skills in Skill or Assura are beneficial.
As you will be joining an
international team you have to be able to speak fluent English.
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