Experienced Analog IC Layout Engineer with strong skills in PMIC to join a Semiconductor business in the Thames Valley in the UK to support the US based Layout team in the Layout of DC-DC converters, Buck and Boost Power Switches, LDO's using latest Cadence Layout Suite tools (V6.1.6 or 7 Wire Editor, Modgen, advanced productivity tools), in BCD technology.
The successful Analog IC Layout Engineer should be self-driven and very motivated and independently working with a Master's degree in Electronics engineering and good electronics
knowledge including a minimum of 5 years of experience in Analog IC Layout. Experience in critical matching of sensitive circuits such as bias blocks, bandgaps, op-amps, and comparators as well as the ability to calculate Ohm's Law, resistance, capacitance, and inductance, are essential.
For further information please contact Ane per email firstname.lastname@example.org
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