Senior Design for Test Engineer - DFT
£££Excellent salary + benefits
Excellent opportunity for a Senior DFT Engineer to join a world-class provider of mixed-signal IC solutions for consumer applications, based in Berkshire, Southern England.
This is a fantastically varied, interesting position in which you will have the opportunity to own the DFT activity for a broad range of projects, working in 55nm and 28nm technology. You'll be working alongside some of industry's highest calibre DFT experts, and be responsible for defining and implementing the test functionality of high quality, high volume mixed signal semiconductor products. This encompasses implementing JTAG, scan, BIST, and other DFT functionalities; you will also play a significant role in developing innovative new test methods and implementing these across the company.
The successful candidate will have a strong chip level background, with a good understanding of the Digital ASIC Design flow and particular hands-on expertise in Design for Test (DFT). The right candidate will offer strong knowledge/experience of ATPG, Logic/RAM BIST and scan insertion, ideally with experience working with digital/mixed signal test platforms. Any prior experience in the audio and / or power testing would be very useful.
A very competitive salary and a range of fantastic benefits including attractive annual bonus, generous holiday allowance, social events, fitness facilities, plus of course a strong pension scheme and private medical insurance. There's a great company culture, which goes a long way!
Key skills: DFT, Design for Test, ASIC, IC, ATPG, BIST, JTAG, test, scan, logic, ATE, Fastscan, TestKompress, Tetramax, Test Compiler, RTL, VHDL, Verilog, Semiconductor, silicon, Thames Valley, Berkshire, UK.
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