{"id":142707,"date":"2026-06-08T00:00:00","date_gmt":"2026-06-07T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-asic-design-engineer-469729\/"},"modified":"2026-08-15T18:07:32","modified_gmt":"2026-08-15T17:07:32","slug":"senior-asic-design-engineer-469729","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/us\/jobs\/senior-asic-design-engineer-469729\/","title":{"rendered":"Senior ASIC Design Engineer"},"content":{"rendered":"<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">I am looking for a Senior&nbsp; ASIC Design Engineer who will join a pioneering deep-tech company who are building the silicon, systems, and software that will redefine the frontier of AI.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">As the world&#8217;s most advanced AI models continue to scale, conventional computing infrastructure is approaching its limits. <strong>This team is taking a fundamentally different approach developing breakthrough technology that enables dramatically higher performance, lower latency, and significantly reduced cost for next-generation AI workloads.<\/strong><\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Founded by leading experts across hardware, software, and machine learning, the company is tackling some of the most challenging problems in modern computing.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">With strong momentum, a rapidly growing team, and ambitious product goals, they are now looking to expand their engineering organisation.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\"><strong>RTL Design Engineer<\/strong><\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">An exciting opportunity has arisen for an experienced and highly motivated RTL Design Engineer to join a world-class hardware team developing cutting-edge compute architectures.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Key Responsibilities<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">RTL Development and Implementation<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Develop and maintain high-quality RTL specifications for complex digital designs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Design and implement performance-critical RTL with a focus on power, performance, and area optimisation<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Take ownership of design work packages from planning through execution and delivery<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Define module architectures, interfaces, partitioning strategies, and implementation plans<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Work closely with verification engineers to ensure functional correctness through simulation and formal verification methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Create and maintain clear documentation covering design intent, interfaces, methodologies, and functional requirements<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Ensure adherence to coding standards, design guidelines, and best engineering practices<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Support a culture of technical excellence, quality, and continuous improvement<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Requirements<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Bachelor&#8217;s, Master&#8217;s, or PhD in Electrical Engineering, Computer Engineering, or a related discipline<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">6+ years of experience in RTL design, digital design, or a related field<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Proven experience developing RTL for complex, high-performance digital systems<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong understanding of advanced design concepts such as pipelining, clock-domain crossing, reset architectures, and power management techniques<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with high-speed and\/or low-power design methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience contributing to designs from specification through implementation<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\"><strong>This is a superb time to join.<\/strong><\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Engineers are given genuine ownership and autonomy, with the freedom to drive solutions from concept through to silicon. Working within small, highly capable teams, they collaborate closely with technical leadership and cross-functional experts across hardware, software, systems, and modelling to solve complex challenges and rapidly turn ideas into reality. The culture combines ambitious technical goals with a pragmatic focus on execution, where curiosity, collaboration, and engineering excellence are valued above hierarchy, and the best ideas win. This is an opportunity to help tackle some of the most significant challenges in modern computing and contribute to technology that could shape the future of AI infrastructure.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">For more information, please contact Rachel Mason at IC Resources.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>I am looking for a Senior&nbsp; ASIC Design Engineer who will join a pioneering deep-tech company who are building the silicon, systems, and software that will redefine the frontier of AI. &nbsp; As the world&#8217;s most advanced AI models continue to scale, conventional computing infrastructure is approaching its limits. This team is taking a fundamentally [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[679,699],"job_expertise":[709],"job_skillset":[692],"consultants":[408],"industry":[],"class_list":["post-142707","jobs","type-jobs","status-publish","hentry","consultants-rachel-mason"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior ASIC Design Engineer - England<\/title>\n<meta name=\"description\" content=\"Apply to Senior ASIC Design Engineer - London, England. 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