{"id":143425,"date":"2026-06-09T00:00:00","date_gmt":"2026-06-08T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-embedded-software-engineer-470036\/"},"modified":"2026-07-24T22:06:54","modified_gmt":"2026-07-24T21:06:54","slug":"senior-embedded-software-engineer-470036","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/us\/jobs\/senior-embedded-software-engineer-470036\/","title":{"rendered":"Senior Embedded Software Engineer"},"content":{"rendered":"<p style=\"margin: 0cm 0cm 10pt;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Brand new opportunity for a highly skilled Senior Embedded Software Engineer in Cardiff to join a start up semiconductor and systems design company.<\/span><\/p>\n<p style=\"margin: 0cm 0cm 10pt;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\"><span style=\"line-height: 115%\">The Senior Embedded Software Engineer will help develop the firmware and software foundations for my client&#8217;s FPGA-enabled, AI-enabled and smart electronic systems.&nbsp;&nbsp;<\/span><span style=\"line-height: 115%\">You will contribute to embedded firmware, hardware abstraction layers, drivers, board support code, real-time control interfaces, diagnostics, integration software and customer-ready demonstrators.&nbsp;&nbsp;<\/span><span style=\"line-height: 115%\">The role combines hands-on embedded C\/C++ development, hardware\/software integration, firmware architecture, test tooling, technical documentation and close collaboration with FPGA, AI, analogue and system teams.&nbsp; It will also involve mentoring \/team leading junior team members.&nbsp;<\/span><\/span><\/p>\n<p style=\"margin: 0cm 0cm 10pt;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Suitable applicants must have:&nbsp;<\/span><\/p>\n<ul style=\"margin-bottom: 0cm;margin-top: 0px\">\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Strong Embedded C\/C++ programming skills<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Experience developing drivers, HALs, board support code or hardware-facing software<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Experience with hardware interfaces such as SPI, I2C, UART, CAN, Ethernet, GPIO, ADC, DAC etc<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Experience bringing up new boards or debugging hardware\/software interfaces<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Good understanding of memory maps, registers, interrupts, timing and embedded system behaviour<\/span><\/li>\n<\/ul>\n<p><span style=\"font-size: 14px;font-family: Verdana\">Any knowledge of the following would be useful:<\/span><\/p>\n<ul style=\"margin-bottom: 0cm;margin-top: 0px\">\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Embedded Linux or RTOS experience, such as FreeRTOS or Zephyr<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">SoC FPGA platforms such as Zynq, MPSoC, ARM, RISC-V or MicroBlaze<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">FPGA\/software interface development<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Python scripting&nbsp;<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Secure boot, signed firmware updates, cryptography or trusted firmware<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Motor control, industrial control, sensors or edge AI systems<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">ONNX Runtime, TensorRT, Vitis AI or edge AI runtime awareness<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: 115%;font-size: 10pt;font-family: Arial, sans-serif\"><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">CI, automated tests, static analysis or structured software release practices<\/span><\/li>\n<\/ul>\n<p><span style=\"font-size: 14px;font-family: Verdana\"><span style=\"line-height: 115%\">The ideal candidate will <\/span><span style=\"line-height: 115%\">be a strong c<\/span><span style=\"line-height: 115%\">ommunicator with <\/span><span style=\"line-height: 115%\">the abili<\/span><span style=\"line-height: 115%\">ty to work across multidisciplinary engineering domains. You should have the a<\/span><span style=\"line-height: 115%\">bility to mentor junior engineers and take ownership of technical delivery.&nbsp;<\/span><span style=\"line-height: 115%\">Any experience in start-up, R&amp;D or product development environments would be useful.<\/span><\/span><\/p>\n<p><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">This is a hybrid role based in Cardiff&nbsp; which offers great flexibility for the right person.<\/span><\/p>\n<p><span style=\"font-size: 14px;line-height: 115%;font-family: Verdana\">Send your CV or get in touch with Emma Windows at IC Resources.<\/span><\/p>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Brand new opportunity for a highly skilled Senior Embedded Software Engineer in Cardiff to join a start up semiconductor and systems design company. The Senior Embedded Software Engineer will help develop the firmware and software foundations for my client&#8217;s FPGA-enabled, AI-enabled and smart electronic systems.&nbsp;&nbsp;You will contribute to embedded firmware, hardware abstraction layers, drivers, board [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[675],"job_expertise":[680],"job_skillset":[696],"consultants":[251],"industry":[],"class_list":["post-143425","jobs","type-jobs","status-publish","hentry","consultants-emma-windows"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior Embedded Software Engineer - Wales<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ic-resources.com\/us\/jobs\/senior-embedded-software-engineer-470036\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Senior Embedded Software Engineer - Wales\" \/>\n<meta property=\"og:description\" content=\"Apply to Senior Embedded Software Engineer - Cardiff, Wales. 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