{"id":225165,"date":"2026-09-22T00:00:00","date_gmt":"2026-09-21T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/principal-dft-engineer-518711\/"},"modified":"2026-10-18T18:20:36","modified_gmt":"2026-10-18T17:20:36","slug":"dft-engineer-518711","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/us\/jobs\/dft-engineer-518711\/","title":{"rendered":"DFT Engineer"},"content":{"rendered":"<h1>DFT Engineer<\/h1>\n<p>Lausanne, Switzerland or UK<\/p>\n<p>I\u2019m working with an innovative semiconductor company developing high-speed, energy-efficient chip-to-chip connectivity solutions for next-generation electronic systems.<\/p>\n<p>They are looking for an experienced DFT Engineer to join their growing engineering team, working across DFT implementation, test pattern development, timing, simulation and silicon bring-up.<\/p>\n<p>This would suit someone who enjoys being hands-on technically and wants to work on complex designs within a fast-moving semiconductor environment.<\/p>\n<h2>Key Responsibilities<\/h2>\n<ul>\n<li>Hierarchical MBIST and scan insertion, including scan compression<\/li>\n<li>Boundary Scan Design (BSD) implementation<\/li>\n<li>ATPG pattern generation, coverage analysis and driving towards high coverage metrics<\/li>\n<li>Running and debugging pattern simulations with timing<\/li>\n<li>Defining test-mode timing constraints and analysing timing reports<\/li>\n<li>Supporting timing convergence across test modes<\/li>\n<li>Developing cycle-accurate functional patterns using IJTAG methodologies<\/li>\n<li>Working closely with test and production engineering teams during probe and final test<\/li>\n<li>Supporting device bring-up and debugging silicon issues<\/li>\n<li>Developing scripts and automation to improve DFT flows<\/li>\n<\/ul>\n<h2>What We\u2019re Looking For<\/h2>\n<ul>\n<li>5+ years of experience in DFT<\/li>\n<li>Experience across DFT implementation, test pattern development and simulation<\/li>\n<li>Experience contributing to DFT solutions for complex ASIC or SoC designs<\/li>\n<li>Strong knowledge of IJTAG methodologies<\/li>\n<li>Experience with hierarchical MBIST insertion<\/li>\n<li>Experience with hierarchical scan insertion and scan compression<\/li>\n<li>Strong ATPG experience across different fault models<\/li>\n<li>Experience analysing fault coverage and driving coverage closure<\/li>\n<li>Strong debugging skills, particularly around timing-aware pattern simulation<\/li>\n<li>Experience with industry-standard EDA tools for DFT, timing and simulation<\/li>\n<li>Good scripting skills for automation<\/li>\n<li>Knowledge of SystemVerilog<\/li>\n<\/ul>\n<h2>Education<\/h2>\n<p>Bachelor\u2019s degree or higher in Electronics, Electrical Engineering, Computer Engineering or a related discipline.<\/p>\n<h2>The Opportunity<\/h2>\n<p>You\u2019ll be joining a company working at the forefront of high-speed semiconductor connectivity, with the opportunity to contribute across the complete DFT lifecycle, from implementation and pattern generation through to silicon bring-up and production test.<\/p>\n<p>The role can be based in Lausanne, Switzerland or the UK.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>DFT Engineer Lausanne, Switzerland or UK I\u2019m working with an innovative semiconductor company developing high-speed, energy-efficient chip-to-chip connectivity solutions for next-generation electronic systems. They are looking for an experienced DFT Engineer to join their growing engineering team, working across DFT implementation, test pattern development, timing, simulation and silicon bring-up. This would suit someone who enjoys [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[718],"consultants":[801],"industry":[],"class_list":["post-225165","jobs","type-jobs","status-publish","hentry","consultants-steph-hutchinson"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.6) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>DFT Engineer - Germany<\/title>\n<meta name=\"description\" content=\"Apply to DFT Engineer - North Rhine Westphalia, Germany. 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