{"id":246547,"date":"2026-10-01T00:00:00","date_gmt":"2026-09-30T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-digital-design-engineer-523848\/"},"modified":"2026-11-06T14:16:22","modified_gmt":"2026-11-06T14:16:22","slug":"senior-digital-design-engineer-523848","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/us\/jobs\/senior-digital-design-engineer-523848\/","title":{"rendered":"Senior Digital Design Engineer"},"content":{"rendered":"<h1>Senior Digital Design Engineer \u2013 RTL \/ ASIC \/ Wireless<\/h1>\n<p>Sophia Antipolis, France | Hybrid<\/p>\n<p>I\u2019m working with an established semiconductor IP company in Sophia Antipolis that is growing its digital hardware team and looking for a Senior Digital Design Engineer to join a team developing advanced Bluetooth and wireless connectivity IP.<\/p>\n<p>This is a broad, hands-on role with real technical ownership.<\/p>\n<p>Rather than being limited to one small part of the flow, you\u2019ll work across architecture, microarchitecture, RTL design, verification and FPGA prototyping, with visibility across the wider system and the opportunity to influence how the technology is developed.<\/p>\n<p>You\u2019ll also play an important role within the team, supporting and mentoring less experienced engineers while remaining very hands-on technically.<\/p>\n<h2>The role<\/h2>\n<p>You\u2019ll take ownership of complex digital blocks and subsystems used within Bluetooth and wireless connectivity platforms.<\/p>\n<p>Your work will include:<\/p>\n<ul>\n<li>\n<p>Designing and implementing digital hardware in Verilog \/ SystemVerilog<\/p>\n<\/li>\n<li>\n<p>Defining microarchitecture and contributing to subsystem architecture<\/p>\n<\/li>\n<li>\n<p>Working on Bluetooth \/ 802.15.4 MAC, PHY and platform IP<\/p>\n<\/li>\n<li>\n<p>Taking designs from specification through RTL, verification, synthesis and FPGA prototyping<\/p>\n<\/li>\n<li>\n<p>Working across the wider ASIC \/ SoC development lifecycle<\/p>\n<\/li>\n<li>\n<p>Collaborating closely with system architecture, RF, software, algorithms and validation teams<\/p>\n<\/li>\n<li>\n<p>Supporting product validation, certification and hardware bring-up<\/p>\n<\/li>\n<li>\n<p>Producing architecture, interface and subsystem documentation<\/p>\n<\/li>\n<li>\n<p>Mentoring and technically guiding other engineers<\/p>\n<\/li>\n<li>\n<p>Contributing to improvements in design methodology, tools and development processes<\/p>\n<\/li>\n<\/ul>\n<h2>What they\u2019re looking for<\/h2>\n<p>You\u2019ll need a strong background in Digital IC \/ ASIC \/ RTL Design, with:<\/p>\n<ul>\n<li>\n<p>Around 8+ years of hands-on digital design experience<\/p>\n<\/li>\n<li>\n<p>Strong Verilog or SystemVerilog<\/p>\n<\/li>\n<li>\n<p>Experience defining microarchitecture<\/p>\n<\/li>\n<li>\n<p>Experience owning digital blocks or subsystems<\/p>\n<\/li>\n<li>\n<p>Good knowledge of SoC and hardware subsystem architecture<\/p>\n<\/li>\n<li>\n<p>Experience across areas such as verification, synthesis, co-simulation or FPGA implementation<\/p>\n<\/li>\n<li>\n<p>Strong problem-solving skills and the ability to work autonomously<\/p>\n<\/li>\n<li>\n<p>Some experience mentoring, guiding or technically supporting other engineers<\/p>\n<\/li>\n<\/ul>\n<p>Experience with Bluetooth, Wi-Fi, UWB, 802.15.4, cellular or other wireless technologies would be a strong advantage.<\/p>\n<h2>Why consider it?<\/h2>\n<p>This is a strong opportunity for someone who wants more breadth and visibility in their next role.<\/p>\n<p>You\u2019ll be joining a specialist engineering team working on commercially deployed wireless IP, where individual engineers have genuine ownership and their work is visible.<\/p>\n<p>The environment is small enough that you\u2019ll have direct access to senior technical leadership, while still working on technology used at significant scale.<\/p>\n<p>You\u2019ll have the opportunity to stay hands-on with RTL and digital design, while taking on more responsibility across architecture, technical decision-making and mentoring.<\/p>\n<p>For engineers coming from larger organisations, it offers the chance to work across a wider part of the design lifecycle rather than being restricted to a very narrow area.<\/p>\n<h2>Location<\/h2>\n<p>Sophia Antipolis, France<\/p>\n<p>Hybrid working, with around 3 days per week onsite.<\/p>\n<p>Candidates will need existing eligibility to work in France. Unfortunately, new visa sponsorship is not currently available.<\/p>\n<p>If you\u2019re an experienced Senior Digital Design Engineer, RTL Design Engineer, ASIC Design Engineer, SoC Design Engineer or FPGA Engineer with strong RTL and microarchitecture experience, get in touch to discuss the role in more detail.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Senior Digital Design Engineer \u2013 RTL \/ ASIC \/ Wireless Sophia Antipolis, France | Hybrid I\u2019m working with an established semiconductor IP company in Sophia Antipolis that is growing its digital hardware team and looking for a Senior Digital Design Engineer to join a team developing advanced Bluetooth and wireless connectivity IP. This is a [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[801],"industry":[],"class_list":["post-246547","jobs","type-jobs","status-publish","hentry","consultants-steph-hutchinson"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.7) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior Digital Design Engineer - France<\/title>\n<meta name=\"description\" content=\"Apply to Senior Digital Design Engineer - Provence Alpes Cote d&#039;Azur, France. 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