{"id":247656,"date":"2026-10-15T00:00:00","date_gmt":"2026-10-14T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-digital-asic-design-engineer-531906\/"},"modified":"2026-11-07T18:15:06","modified_gmt":"2026-11-07T18:15:06","slug":"senior-digital-asic-design-engineer-531906","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/us\/jobs\/senior-digital-asic-design-engineer-531906\/","title":{"rendered":"Senior Digital ASIC Design Engineer"},"content":{"rendered":"<p><span style=\"font-family: Verdana;font-size: 14px\">This is an exciting opportunity for Senior Digital ASIC Design Engineer to join an established semiconductor engineering team working on the next generation of low power wireless SoCs.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The Senior Digital ASIC Design Engineer will be involved across the front end development flow, from architecture and RTL development through integration, verification and ultimately silicon. The role offers significant technical ownership and the opportunity to contribute to complex digital designs used in high volume connected products.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The role will involve:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Leading the development of RTL for complex digital ICs and SoC designs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contributing to architecture and design decisions across IP and larger subsystems<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Taking ownership of designs through development, integration and tape out<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Working closely with verification, DFT, software and physical implementation teams<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Driving synthesis, timing and design quality activities<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contributing to low power design methodologies and optimising designs for performance and efficiency<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Using scripting and automation to improve design and development flows<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Providing technical guidance and supporting less experienced engineers<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The ideal Senior Digital ASIC Design Engineer will have:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong commercial experience in ASIC, SoC or digital IC design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Solid hands on experience with Verilog or SystemVerilog RTL<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong understanding of the digital design flow from RTL through synthesis and implementation<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience taking complex designs through development and integration<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Good understanding of areas such as synthesis, timing, CDC or low power design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Previous experience taking technical ownership of projects or design areas<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">This Senior Digital ASIC Design Engineer position would suit an experienced engineer who enjoys staying close to the technical work while taking greater ownership of complex designs and contributing to wider engineering decisions.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For more information, please contact Jordan Browne.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This is an exciting opportunity for Senior Digital ASIC Design Engineer to join an established semiconductor engineering team working on the next generation of low power wireless SoCs. The Senior Digital ASIC Design Engineer will be involved across the front end development flow, from architecture and RTL development through integration, verification and ultimately silicon. The [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[239],"industry":[],"class_list":["post-247656","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.7) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior Digital ASIC Design Engineer - England<\/title>\n<meta name=\"description\" content=\"Apply to Senior Digital ASIC Design Engineer - Bristol, England. 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