Physical Design Engineer

Zurich, Switzerland
Exciting start up opportunity
Job ID: 466305
Jordan Browne
Jordan Browne

ASIC | Verification | Physical Design

+44 (0)118 907 3075

jordan.browne@ic-resources.com

An innovative semiconductor company that is expanding its silicon engineering team and looking to hire a Physical Design Engineer to play a key role in the development of next-generation ASIC and SoC products.

This Physical Design Engineer position offers the opportunity to work across the complete implementation flow, taking designs from RTL through to signoff while collaborating closely with front-end, verification and system teams. You’ll be involved in solving complex timing and physical implementation challenges on advanced technology nodes and will have genuine influence over design methodologies and flow improvements.

What You’ll be doing

  • Driving ASIC implementation from synthesis through place & route, timing closure and final signoff.
  • Developing and refining timing, power and physical constraints to achieve demanding performance targets.
  • Performing static timing analysis and resolving complex implementation challenges.
  • Working closely with RTL and verification teams to ensure designs are optimised for physical implementation.
  • Supporting low-power implementation strategies and modern SoC integration activities.
  • Enhancing automation and methodology through scripting and flow development.
  • Contributing to successful tapeouts and post-implementation analysis.

Experience we’re looking for

  • Proven experience in ASIC Physical Design and back-end implementation.
  • Strong understanding of synthesis, place & route, clock tree synthesis, STA and timing closure.
  • Experience owning or contributing to the RTL-to-GDSII flow.
  • Knowledge of modern SoC architectures and integration flows.
  • Familiarity with Verilog/SystemVerilog and an understanding of the interaction between RTL and physical implementation.
  • Hands-on experience with industry-standard EDA tools such as Synopsys, Cadence or Siemens tool suites.
  • Scripting experience using Python, Tcl or similar languages to improve design productivity and automation.
  • Ability to debug and solve complex implementation and timing issues.

For more information please contact Jordan Browne at IC Resources for more information.