Design Verification Manager | Step Up from Principal | UK Relocation

Newbury, UK | £100,000–£115,000+ | Hybrid | Permanent
Applications welcomed from across the UK & Europe

Already leading engineers and driving verification strategy, but still waiting for the Manager title?

This could be the step you’ve been waiting for.

I’m recruiting for a Design Verification Manager to lead a team of around 10 engineers while remaining deeply involved in the technology.

Think 50% leadership, 50% engineering. You don’t have to leave verification behind the moment you become a manager.

And you don’t necessarily need to already have „Manager“ in your title.

Strong Principal / Senior Principal Verification Engineers and Technical Leads who are already mentoring engineers, leading projects, interviewing candidates or taking informal responsibility for a team are actively encouraged to apply.

Why make the move?

You’ll be joining a highly experienced UK semiconductor team at a point where you’ll have the opportunity to genuinely shape what comes next.

The team needs someone who can bring people together, develop engineers and influence how verification is done, while still having the technical credibility to step into a difficult verification problem and help determine the way forward.

You’ll work across a particularly broad verification environment including:

• SystemVerilog / UVM
• Formal Verification
• Hardware Emulation
• Mixed-Signal Verification
• HW/SW Co-verification

You don’t need experience across every area. Strong UVM / ASIC verification fundamentals are much more important, with the opportunity to broaden your expertise further in areas such as formal, emulation and mixed-signal verification.

You’ll also work closely with digital, analog and other engineering disciplines, with exposure to complex silicon programmes for a globally recognised US technology customer.

What are we looking for?

Ideally, you’ll have:

• Around 10+ years of hands-on ASIC / SoC Design Verification experience
• Strong SystemVerilog / UVM expertise
• Experience leading verification projects and engineers
• Previous people management or genuine de facto management experience
• Strong knowledge of verification strategy, methodology, coverage and debugging
• Exposure to formal verification, or a genuine interest in developing it
• The technical credibility to lead experienced verification engineers
• Strong communication and stakeholder-management skills

Experience with hardware emulation, mixed-signal verification or HW/SW co-verification would be advantageous but isn’t essential.

A genuine step into management

This could be particularly interesting if you’re currently a Principal Verification Engineer, Senior Principal Engineer or Verification Lead and have reached the point where you’re already doing much of the manager’s job without having the formal ownership.

Here, you’ll have the opportunity to build and develop your own team, influence verification methodology and take a visible leadership position, without giving up being an engineer.

Location & Package

 Newbury, UK, hybrid, typically around 3 days on-site
 £100,000–£115,000+ base, depending on experience
 UK and European applicants encouraged

If you’re an experienced ASIC / SoC Verification Manager, Principal Verification Engineer or Technical Lead considering your next step, whether you’re already in the UK or looking to relocate from Europe, apply for a confidential conversation or contact Steph Hutchinson.