Senior / Staff Logic Design Engineer – AI Silicon

Eindhoven, Netherlands

Are you an experienced RTL Design Engineer who wants to work on genuinely new processor technology rather than another incremental SoC update?

I’m working with a fast-growing semiconductor company in Eindhoven developing a new generation of AI compute and accelerator silicon. The team is building highly complex processor and SoC technology from the ground up, with a strong focus on performance, power efficiency and scalable AI workloads.

They are now looking for a Senior / Staff Logic Design Engineer to take ownership of key RTL blocks and help turn architectural concepts into production-ready silicon.

What you’ll be doing

You’ll work across the full front-end design flow, including:

• Developing synthesizable SystemVerilog / Verilog RTL

• Translating architecture and ISA requirements into microarchitecture

• Designing processor, accelerator and complex SoC blocks

• Integrating internal and third-party IP

• Working closely with verification, architecture and physical design teams

• Supporting synthesis, timing closure and PPA optimisation

• Driving CDC / RDC quality and sign-off

• Implementing low-power techniques including clock gating, power gating and memory power management

• Supporting gate-level simulation, FPGA and emulation activity

• Taking real ownership of design blocks through to tape-out

What they’re looking for

You’ll ideally have:

• 5+ years of ASIC / SoC RTL Design experience

• Strong SystemVerilog or Verilog

• Experience with processors, accelerators or complex SoCs

• Strong microarchitecture experience

• Experience with synthesis and timing-aware RTL design

• Good knowledge of AMBA / AXI / AHB / APB

• Strong CDC / RDC expertise

• Hands-on low-power design experience

• Gate-level simulation and debugging experience

• At least one successful ASIC tape-out

• Experience owning one or more design blocks through the development cycle

Why this is interesting

This is a chance to join a semiconductor company at a genuinely exciting point in its growth, while the core architecture and silicon platform are still being built.

You won’t be joining a huge team where your work disappears into one tiny corner of the chip. You’ll have meaningful ownership, work closely with architecture and verification, and contribute directly to the development of advanced AI processor and accelerator technology.

For someone who enjoys RTL design, processor architecture, complex SoCs and high-performance silicon, this is a particularly strong opportunity in the Eindhoven semiconductor market.

If you’re a Senior RTL Design Engineer, Staff ASIC Design Engineer, SoC Design Engineer, Processor Design Engineer or Logic Design Engineer based in the Netherlands or interested in relocating to Eindhoven, please get in touch.