Analog IC Layout Engineer

I am seeking an Analog Mixed Signal IC Layout Engineer to join my client’s European design centre in Prague. The team designs IP on advanced CMOS nodes, including FinFET and GAA, for data centre, automotive, AI and low power IoT applications.

Responsibilities

• Create full custom layout for analog and mixed signal blocks on advanced CMOS processes
• Collaborate with circuit designers on floorplans and device placement to meet matching and performance targets
• Perform extraction and assist with post layout simulation to verify behaviour against schematic
• Run DRC, LVS and ERC and work to close physical verification issues
• Diagnose layout related silicon issues during bring up and support lab debug and validation
• Improve layout methodology and produce clear documentation for reuse

Key skills

• Strong background in analog and mixed signal layout techniques, including matching, shielding and guard rings
• Familiar with layout considerations for:
  • Bandgap references and precision amplifiers
  • Precision sense amplifiers
  • I/O and interface circuits
  • Low jitter PLLs and clocking blocks
• Proficient with industry-standard layout and verification tool flows

This role is open only to candidates who already have the right to work without requiring sponsorship.

If you are local or willing to relocate and would like to work on cutting edge semiconductor technology, get in touch with Parm Shergill.