Analog RF IC Layout Engineer

I am recruiting for a Senior Analog / RF IC Layout Engineer on behalf of my client, a specialist semiconductor business developing custom mixed signal, RF and interface IP solutions across a range of CMOS technologies.

This Senior Analog / RF IC Layout Engineer position offers the opportunity to work remotely within Europe while contributing to complex custom IC developments across advanced and mature nodes. The Senior Analog / RF IC Layout Engineer will work closely with circuit designers on silicon proven IP used in demanding communications, industrial and automotive applications.

Responsibilities will include, but are not limited to:

• Full custom layout of analog, RF and mixed signal blocks
• Support for I/O related structures, ESD aware layouts and pad ring integration
•  Perform DRC, LVS and parasitic extraction sign off
•  Optimise layouts for matching, noise isolation, symmetry and reliability
• Collaborate with analog and RF designers to improve area and performance
•  Contribute to tapeouts across multiple process technologies
•  Work with CAD and methodology teams to maintain efficient design flows

I am looking for someone with experience in some of the following areas:

• 6+ years of analog and RF IC layout experience within FinFET technologies
• Strong track record delivering silicon proven designs
• Excellent understanding of device matching, parasitics and signal integrity
• Experience with Cadence Virtuoso and industry standard verification tools
• Familiarity with advanced and mature CMOS nodes
• Experience with ESD structures, pad ring design or I/O layout
• Exposure to mixed voltage or high voltage environments
• Understanding of RF layout techniques, including shielding and isolation

Get in touch with Parm Shergill if you would like to explore this opportunity further.