Senior Digital Design Engineer

Provence Alpes Cote d'Azur, France
Build Bluetooth IP used at scale
Job ID: 523848

Senior Digital Design Engineer – RTL / ASIC / Wireless

Sophia Antipolis, France | Hybrid

I’m working with an established semiconductor IP company in Sophia Antipolis that is growing its digital hardware team and looking for a Senior Digital Design Engineer to join a team developing advanced Bluetooth and wireless connectivity IP.

This is a broad, hands-on role with real technical ownership.

Rather than being limited to one small part of the flow, you’ll work across architecture, microarchitecture, RTL design, verification and FPGA prototyping, with visibility across the wider system and the opportunity to influence how the technology is developed.

You’ll also play an important role within the team, supporting and mentoring less experienced engineers while remaining very hands-on technically.

The role

You’ll take ownership of complex digital blocks and subsystems used within Bluetooth and wireless connectivity platforms.

Your work will include:

  • Designing and implementing digital hardware in Verilog / SystemVerilog

  • Defining microarchitecture and contributing to subsystem architecture

  • Working on Bluetooth / 802.15.4 MAC, PHY and platform IP

  • Taking designs from specification through RTL, verification, synthesis and FPGA prototyping

  • Working across the wider ASIC / SoC development lifecycle

  • Collaborating closely with system architecture, RF, software, algorithms and validation teams

  • Supporting product validation, certification and hardware bring-up

  • Producing architecture, interface and subsystem documentation

  • Mentoring and technically guiding other engineers

  • Contributing to improvements in design methodology, tools and development processes

What they’re looking for

You’ll need a strong background in Digital IC / ASIC / RTL Design, with:

  • Around 8+ years of hands-on digital design experience

  • Strong Verilog or SystemVerilog

  • Experience defining microarchitecture

  • Experience owning digital blocks or subsystems

  • Good knowledge of SoC and hardware subsystem architecture

  • Experience across areas such as verification, synthesis, co-simulation or FPGA implementation

  • Strong problem-solving skills and the ability to work autonomously

  • Some experience mentoring, guiding or technically supporting other engineers

Experience with Bluetooth, Wi-Fi, UWB, 802.15.4, cellular or other wireless technologies would be a strong advantage.

Why consider it?

This is a strong opportunity for someone who wants more breadth and visibility in their next role.

You’ll be joining a specialist engineering team working on commercially deployed wireless IP, where individual engineers have genuine ownership and their work is visible.

The environment is small enough that you’ll have direct access to senior technical leadership, while still working on technology used at significant scale.

You’ll have the opportunity to stay hands-on with RTL and digital design, while taking on more responsibility across architecture, technical decision-making and mentoring.

For engineers coming from larger organisations, it offers the chance to work across a wider part of the design lifecycle rather than being restricted to a very narrow area.

Location

Sophia Antipolis, France

Hybrid working, with around 3 days per week onsite.

Candidates will need existing eligibility to work in France. Unfortunately, new visa sponsorship is not currently available.

If you’re an experienced Senior Digital Design Engineer, RTL Design Engineer, ASIC Design Engineer, SoC Design Engineer or FPGA Engineer with strong RTL and microarchitecture experience, get in touch to discuss the role in more detail.