Senior Physical Design Engineer

A well-funded deep-tech semiconductor startup developing next-generation computing technology at the intersection of artificial intelligence and advanced hardware.

They are focused on building advanced hardware designed to unlock significant improvements in AI performance and efficiency.

The role

As a Senior Physical Design Engineer, you will work on the physical implementation of advanced semiconductor devices, ensuring designs meet demanding performance, power, and area targets. The role sits within a collaborative engineering environment where physical design engineers work closely with RTL, DFT, and system teams to translate innovative concepts into silicon.

Key responsibilities

• Carry out physical design implementation tasks including floorplanning, placement, clock tree synthesis, and routing
• Drive timing closure and optimise designs to meet performance, power, and area goals
• Support physical verification and sign-off processes ahead of tapeout
• Collaborate with front-end design teams to resolve timing and integration challenge
• Help improve backend flows, automation, and implementation methodologies

Required experience

• Several years of experience in digital physical design or backend implementation
• Strong understanding of the ASIC implementation flow from RTL through to GDSII
• Hands-on experience with industry-standard EDA tools, particularly within the Cadence toolchain
• Knowledge of timing analysis, physical verification, power integrity, and advanced technology node
• Experience with scripting such as Tcl to support automation of backend flows
• Experience working on complex SoC or hierarchical chip designs would be beneficial

For more information on this role or others, please contact Jordan Browne at IC Resources.