Senior Verification Engineer

Help Shape the Next Generation of AI Accelerator Hardware.

I’m currently working with a well-funded semiconductor start-up that’s developing a new generation of AI accelerator architectures designed to deliver significantly greater efficiency than traditional compute solutions.

As the team continues to grow, they’re looking for an experienced Verification Engineer to take ownership of verification strategy across a range of cutting-edge ASIC developments. This is an opportunity to influence both methodology and architecture while working alongside highly experienced Design, Software and Systems Engineers.

The role

You’ll play a key role in ensuring the quality and robustness of complex accelerator designs, defining verification methodology and building scalable verification environments from the ground up.

Working within a collaborative engineering team, you’ll have the opportunity to shape verification processes, influence architectural decisions and drive continuous improvements across the development flow.

Responsibilities

• Define and own the verification strategy for complex AI accelerator IP and SoC components
• Develop verification plans, testbenches and end-to-end verification environments
• Monitor functional coverage, verification metrics and overall design quality
• Collaborate closely with RTL, Architecture and Software teams throughout development
• Help influence future architecture by providing verification-driven feedback
• Develop automation and verification infrastructure to improve engineering efficiency
• Drive continuous improvements to verification methodology and design quality

What they’re looking for

• Strong experience developing verification plans for complex ASIC or SoC designs
• Experience verifying designs using AXI or similar on-chip bus protocols
• Familiarity with commercial verification toolchains alongside open-source environments such as Cocotb and Verilator
• Experience scripting with Python, Tcl or similar languages
• Knowledge of CI/CD workflows and automated verification infrastructure
• Experience with transaction-level verification methodologies, ideally UVM
• Familiarity with Git or other version control systems
• Exposure to formal verification techniques would be advantageous

About you

You’ll thrive in a collaborative, fast-moving engineering environment where you’ll have genuine ownership and the opportunity to influence technical direction.

You’re someone who enjoys solving complex verification challenges, communicating effectively across multidisciplinary teams and continuously improving both methodology and product quality.

If you’re looking for a role where your ideas will have a real impact on next-generation AI hardware, this is an excellent opportunity to make your mark.

Please contact Rachel Mason for more information.