Rachel Mason
ASIC | Verification
CPU Verification Engineer - Bristol
Hybrid working model and a fantastic compensation package.
As a Senior Staff CPU Verification Engineer, you will work hands-on and contribute across the Verification team possibly in a lead role or key contributor in one of the key functions needed for CPU/IP Verification. You will take the ownership and drive verification methodologies for high quality deliveries.
This is an exciting time to join an established Semiconductor in the vibrant city of Bristol. Bristol is a city straddling the River Avon in the Southwest of England with a prosperous maritime history. Its former city-centre port is now a cultural hub, the Harbourside, where the M Shed museum explores local social and industrial heritage. The harbour's 19th-century warehouses now contain restaurants, shops and cultural institutions.
Key Skills
Visa sponsorship can be provided but relocation is a must and remote work is NOT an option for the role.
For more information, please contact Rachel Mason.
Apply now
Hybrid working model and a fantastic compensation package.
As a Senior Staff CPU Verification Engineer, you will work hands-on and contribute across the Verification team possibly in a lead role or key contributor in one of the key functions needed for CPU/IP Verification. You will take the ownership and drive verification methodologies for high quality deliveries.
This is an exciting time to join an established Semiconductor in the vibrant city of Bristol. Bristol is a city straddling the River Avon in the Southwest of England with a prosperous maritime history. Its former city-centre port is now a cultural hub, the Harbourside, where the M Shed museum explores local social and industrial heritage. The harbour's 19th-century warehouses now contain restaurants, shops and cultural institutions.
Key Skills
- A Bachelor's degree in Electrical/Electronic Engineering or equivalent degree;
- Full and deep understanding of the CPU architectures is an advantage;
- Expertise in hardware verification languages such as SV UVM, UVM and SVAs, and SystemVerilog;
- Knowledge of verification platform and framework development, RTL and Gate level (optional) functional verification;
- Proven experience of IP/Sub-System/SoC verification including delivering to metric targets;
- Experience with assembly language development and software development tools;
- Experience in C/C++ with a focus on modern C++ (i.e. C++11/14), SystemC TLM 2.0, Perl and Python.
Visa sponsorship can be provided but relocation is a must and remote work is NOT an option for the role.
For more information, please contact Rachel Mason.