We invite you to join a highly motivated team of consultants, providing clients with the very best in verification. You will be exposed to a diverse range of designs and application areas, working on leading edge Audio, Automotive, Comms, Processors, Space, Video and more.
You will have the opportunity to travel, present at conferences, win Best Paper awards, or get involved with industry standards. Verilab does it all. In addition to being good, they like to be seen to be good.
As a permanent full-time employee of Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly involved with helping build and grow client relationships. You will be working alongside some of the smartest people in the industry. Verilab is a company where your skills will be tested, nurtured, and where your contribution makes a difference.
- BSc/MSc in Electronic Engineering, Computer Engineering, or Computer Science.
- 7 years of project-proven verification experience.
- Experienced SystemVerilog/UVM developer:
- Block and integration-level
- Coverage-driven, self-checking verification environments from scratch
- High-level sequence-based stimulus
- Complex transaction-based checkers (e.g. scoreboards with data translation and ordering)
- Register models
- Specification level checks for several different protocols, e.g. AXI, DDRx, PCIe, USBx.
- Verification planning:
- Requirements capture and traceability
- Estimation, prioritizing
- Metrics used to determine verification closure
- Ownership of work, from planning to implementation.
- Experience dealing directly with strict deadlines and technical challenges.
- Effective communication and collaboration with others.
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